Sample hold circuit

Abstract

Abstract PURPOSE:To hold sampling value irrespective of sampling period and improve versatility of a sample hold circuit by compensating analog value held according to capacity using a feedback circuit. CONSTITUTION:When a sampling pulse phi1 and a timing pulse phi2 are obtained, a sampling MOSTT1 and the first switching MOSTT2 are turned on, and potential corresponding to analog input AN at that time is accumulated in the first and second capacities C1, C2. When the phi1, phi2 are inverted, T1, T2 are turned off, and a signal held by the first capacity C1 is converted to low impedance by the first impedance conversion circuit IM and outputted. A signal held by C2 is converted to low impedance by the second impedance conversion circuit IMP, and fed back to C1 through the second switching MOSTT3 which is turned on by an inversion pulse phi3. The phi3 is an inversion pulse phi3 and the phi2 is a pulse of shorter period than phi1.

Inventors

• 👤 Kenichi Kojima
• 👤 健一 小島

Bibliographic Details