Vertical structure field effect transistor

Abstract

Abstract PURPOSE:To reduce the channel resistance when the titled transistor is in ON state by a method wherein an oblong concavity, having the prescribed angle to the direction <100>, is formed and a surface (001) or (010) is used as a channel, thereby enabling to increase the mobility of electrons. CONSTITUTION:An etching is performed on the silicon substrate, having a face (100) and a facet in the direction <100>, in such a manner that an oblong concavity P having the angle of 45 deg. to the direction <110> can be formed. The above-mentioned silicon etching is performed vertical to the surface (100). At this time, the side face etched in rectangular parallelepiped are formed into the faces (001) and (010), which is equivalent to the surface (100). These two surfaces are used as a channel part.

Inventors

• 👤 Daisuke Ueda
• 👤 大助 上田
• 👤 Hiromitsu Takagi
• 👤 弘光 高木

Bibliographic Details