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Patent JPS5969944A successfully refreshed from Google Patents.
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JPS5969944A Expired / Lapsed JP ⏱️ 0.0 years remaining

Manufacture of integrated circuit from which bottom insulator is isolated

Assignee: Sanken Electric Co Ltd
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Filing: 1982-10-14
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Granted: —
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Expires: 2002-10-14
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Abstract

Abstract PURPOSE:To form an inter-element isolation region comparatively easily by leaving a frame-shaped reinforcing section in a section corresponding to the external region of the isolation region, forming a recessed section reaching the inter-element isolation region from the back of a wafer and isolating the bottom of an insular region by insulator. CONSTITUTION:Four p type regions 17, 18, 19, 20 are formed through a boron diffusion, and four n<+> type regions 21, 22, 23, 24 are formed through a phosphorus diffusion. Openings are formed to the SiO2 film 25 of the surface of the wafer, aluminum is evaporated, and electrodes 26 and wirings for each element are formed. An electrode 27 is also formed to the back 8b of the wafer 8. The electrode 26a, 26b sections for connecting external leads are removed, and a polyimide resin layer 28 is formed on the surface of the wafer 8. The electrode 27 and an n<+> type silicon substrate 6 are etched from the back 8b side of the wafer, and the recessed section 29 reaching the bottom of the groove, the inter- element isolation region 12, is formed. The positions of chain lines 32 are cut, the wafer 8 is isolated as an IC chip, and the IC chip 33 of side-surface dielectric isolation/bottom air insulation isolation is completed.

Inventors

  • 👤 Masahiro Ogino
  • 👤 荻野 方宏
  • 👤 Shunichi Sato
  • 👤 俊一 佐藤
  • 👤 Takeshi Sugihara
  • 👤 毅 杉原

Bibliographic Details

Application Number —
Jurisdiction JP
Data Source google_patents
Last Synchronized 2026-11-08 08:14
CPC Classifications
H; H10; H10W; H10W10/00; H10W10/01; H10W10/021; H10P; H10P90/00; H10P90/19; H10P90/1904; H10P90/1906; H10W10/011; H10W10/061; H10W10/10; H10W10/181; H10W10/20; H10W10/041; H10W10/40

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