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JPS595675A Expired / Lapsed JP ⏱️ 0.0 years remaining

Semiconductor device

Assignee: Fujitsu Ltd
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Filing: 1982-07-01
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Granted: —
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Expires: 2002-07-01
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Abstract

Abstract PURPOSE:To eliminate a reverse direction leaking current and unstable operation, by providing a layer comprising p type indium phosphide (p-InP) on an electron supplying layer comprising n<+> type indium phosphide (n<+>-InP), and forming a gate electrode thereon. CONSTITUTION:On a substrate 1 comprising semiinsulating indium phosphide (InP), a channel layer 2 comprising nondoped indium gallium arsenide (In0.53Ga0.47 As), an electron supplying layer 3 comprising n<+> type indium phosphide (n<+>-InP), and a p<+> type indium phosphide (p<+>-InP) layer 4 are sequentially formed. A control electrode 6 comprising three layers of titanium, platinum, and gold (Ti/Pt/Au) is selectively formed in a gate electrode forming region. In an input and output electrode forming region, n type impurities such as silicon are introduced so as to reach the channel layer 2. Heat treatment is performed, and an electrode connecting region 7 with the input and output electrodes is formed. Then, the output electrode 8 comprising double layers of gold germanium (Au Ge)/gold(Au) is selectively formed.

Inventors

  • 👤 Masahiko Takigawa
  • 👤 正彦 滝川

Bibliographic Details

Application Number —
Jurisdiction JP
Data Source google_patents
Last Synchronized 2026-11-04 14:14
CPC Classifications
H; H10; H10D; H10D30/00; H10D30/40; H10D30/47; H10D30/471; H10D30/473

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