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JPS5952879A Expired / Lapsed JP ⏱️ 0.0 years remaining

Manufacture of semiconductor device

Assignee: Panasonic Holdings Corp
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Filing: 1982-09-20
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Granted: —
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Expires: 2002-09-20
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Abstract

Abstract PURPOSE:To contrive microscopic formation and high efficiency of the titled semiconductor device having a double layer gate construction by a method wherein the eave located on the side face of polysilicon is removed by vapor- depositing CVD SiO2 on an Si3N4, and a high-pressure oxidizing method is used in formation of an interlayer insulating film, thereby enabling to perform a low-temperature oxidization. CONSTITUTION:A field oxide film 1 of 8,000Angstrom in thickness is selectively formed on the substrate 8 of P (100) and 8-12OMEGA/cm, the first gate oxide film 2 of 200Angstrom is formed on the above, and an Si3N4 9 of 400Angstrom is formed thereon by performing a CVD method. Then, phosphorus-doped polysilicon 3 is vapor-deposited in the thickness of 5,000Angstrom using a CVD method, and a photo etching is performed. SiO2 11 of 200Angstrom is vapor-deposited on the polysilicon 3 by performing a CVD method. Subsequently, polysilicon 3 is oxidized using a high-pressure oxidizing method. Then, said SiO2 11 is removed using the etchant of NH4F:Hf=5:1, and Si3N4 is removed by performing a dry etching. A phosphorus-doped polysilicon 6 is formed, a photo etching is performed and the second gate polysilicon 6 is formed. Then, AS is ion-implanted in self-aligning manner and an N<+> diffusion layer is formed.

Inventors

  • 👤 Jun Fukuchi
  • 👤 福地 順
  • 👤 Seiji Ueda
  • 👤 誠二 上田
  • 👤 Akira Takeishi
  • 👤 武石 彰
  • 👤 Kunihiko Asahi
  • 👤 旭 国彦

Bibliographic Details

Application Number —
Jurisdiction JP
Data Source google_patents
Last Synchronized 2026-11-01 21:25
CPC Classifications
H; H10; H10D; H10D30/00; H10D30/60

Claims Analysis

Total Claims: 0
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References Cited (Backward Citations)

JPS5134678A Cited
JPS53120389A Cited
JPS5430785A Cited
JPS54159886A Cited

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