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JPS5946044A Expired / Lapsed JP ⏱️ 0.0 years remaining

semiconductor equipment

Assignee: NEC Corp
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Filing: 1982-09-08
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Granted: —
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Expires: 2002-09-08
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Abstract

Abstract PURPOSE:To inhibit the generation of switching noises even using a thin power supply wiring by setting up a capacitance between a power supply wire in a master slice system logic IC and a ground wire. CONSTITUTION:The capacitance 607 is arranged at a position where a cell series is divided into N pieces of equal parts between the pectinate power supply wire 602 of a logic IC pellet and the ground wire 605, charges are fed from the capacitance 607 on the switching of a logic circuit, and a voltage drop generated in a power supply wiring is reduced to lower noises up to 1/N. Capacitance is obtained as the sum of MOS capacitance through an insulating film 706 and the junction capacitance of an N type substrate 703 and a P layer 704 when the width of the ground wire 701 is widened selectively and connected to the substrate 703 and the power supply wire 702 is connected to the layer 704. According to said constitution, the device is made free from noises due to the impedance of the power supply wiring only by previously dispersing and arranging capacitance to a power supply wiring system.

Inventors

  • 👤 Masakazu Kaga
  • 👤 加賀 雅和

Bibliographic Details

Application Number —
Jurisdiction JP
Data Source google_patents
Last Synchronized 2026-11-09 19:39
CPC Classifications
H; H10; H10D; H10D84/00; H10D84/01; H10D84/0123; H10D84/0126; H10D84/02; H10D84/03; H10D84/038

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