Control system for double hierarchical stack

Abstract

Abstract PURPOSE:To inhibit a block specified by a save register from being expelled from a fast memory and to improve the efficiency of use by equipping a push- down stack of double hierarchical structure consisting of the fast memory and a slow mass storage memory with a pointer register accessed directly and the save register. CONSTITUTION:The push-down stack 3 of double hierarchical structure is provided with the pointer register PTR to which an address is sent directly and its save register PTS and when the registers PTR and PTS are shared among various pointers L1-Ln, a physical address PBA in the save register PTS is supplied to a replacement deciding circuit LRU 7 and a block address PBA specified by the save register gives the priority for inhibiting the expelling from the fast memory. Consequently, a block specified by the save register is left in the fast memory all the time, so access in resetting is speeded up and the utilization of the save register is improved.

Inventors

• 👤 Akira Hattori
• 👤 彰 服部
• 👤 Takeshi Shinoki
• 👤 剛 篠木

Bibliographic Details