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JPS5935448A Expired / Lapsed JP ⏱️ 0.0 years remaining

Master slice integrated circuit device

Assignee: NEC Corp
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Filing: 1982-08-23
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Granted: —
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Expires: 2002-08-23
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Abstract

Abstract PURPOSE:To ensure channels required without lowering efficiency on the use of fundamental cells by using at least two blocks of the cells and forming a plurality of channels exclusive for wirings between these blocks. CONSTITUTION:The fundamental cells 2 are divided into four and arranged on a semiconductor chip 1 as A-D, and the channels 4 exclusive for wirings are formed among these fundamental cell blocks A-D apart from conventional channels 3 among the fundamental cells. Consequently, when electronic circuits set up to the fundamental cell block A and the fundamental cell block D are connected by using a plurality of wirings, they can be wired without crushing the fundamental cells. Accordingly, efficiency on the use of the cells is improved, and the degree of integration is also enhanced.

Inventors

  • 👤 Satoru Hattori
  • 👤 悟 服部

Bibliographic Details

Application Number —
Jurisdiction JP
Data Source google_patents
Last Synchronized 2026-11-03 14:33
CPC Classifications
H; H10; H10D; H10D84/00; H10D84/90

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