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JPS592471A Expired / Lapsed JP ⏱️ 0.0 years remaining

Base band transmission system

Assignee: Fujitsu Ltd
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Filing: 1982-06-29
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Granted: —
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Expires: 2002-06-29
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Abstract

Abstract PURPOSE:To attain high speed re-locking of a PLL circuit of a device A, by transmitting a lock state of the PLL circuit of the device A to a device B in R- bit and transmitting a signal of a prescribed period from the device B when an R-bit represents out of lock. CONSTITUTION:A transmission signal consists of a timing detecting bit F, a transmission timing ST, a transmission data SD and a remote bit R, an F-bit repeats sequentially (1), (0) at each frame and when the R-bit has the same logic as that of the F-bit, it represents the locking of the PLL circuit of the own station, and when the logic is always zero, it represents out of lock. The device A transmits the transmission signal to the device B, and when the PLL circuit is unlocked at the demodulation section 52 of the device A, the R-bit is zero and in other cases, a signal having a logic equal to that of the F-bit is transmitted to request the transmission of a signal of re-lock of the PLL circuit to the device B. The modulation section 63 of the device B transmits a signal where all bits of one frame are equal to the logic of the F-bit to the device A, the PLL circuit of the demodulation section 52 of the device A is re-locked and the logic of each signal is returned to (1).

Inventors

  • 👤 Tomoaki Takeshima
  • 👤 武島 智昭
  • 👤 Shigeru Yoshida
  • 👤 茂 吉田

Bibliographic Details

Application Number —
Jurisdiction JP
Data Source google_patents
Last Synchronized 2026-11-05 18:11
CPC Classifications
H; H04; H04L; H04L7/00; H04L7/04; H04L7/08

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