Level converting circuit

Abstract

Abstract PURPOSE:To avoid malfunction even if a potential difference of power supplies operating respectively two circuits is large and to suppress the power consumption, in a level converting circuit connected between the two circuits operated with the power supplies having different potentials from each other and matching the two circuits. CONSTITUTION:The 1st circuit 1 comprising a C-MOS device outputs a signal fluctuated between the 1st power supply Vs1 and a reference potential VDD to an output terminal 3 and the 2nd circuit 2 inputs a signal having an amplitude changed between the reference potential VDD and the 2nd power supply VS2 Although a through-current flows at the moment when a transistor (TR)P2 turns on, as the current becomes large, the negative feedback is applied with a resistor inserted between the source of an N TR and a power supply having Vs2(=-2.5V) of voltage and the current is limited. Further, when the TRP2 is turned on, a TRP3 inputting the inverted level of the input to the TRP2 is cut off completely, no through-current flows, charges charged in the parasitic capacitance such as the drain capacitance of the TRP3 and a TRN3 are discharged through the TRN3 and the potential level at a terminal 9 is decreased. Thus, a TRN2 is turned off rapidly and the potential level at a terminal 8 is risen quickly to 0V.

Inventors

• 👤 Yoichi Miyagawa
• 👤 洋一 宮川
• 👤 Norihiko Saeki
• 👤 佐伯　典彦

Bibliographic Details