Semiconductor nonvolatile memory device

Abstract

Abstract PURPOSE:To form a transistor as a memory by a method wherein a memory gate is decided as the first conductor layer, a control gate as the second conductor layer, an impurity diffused layer is removed, and the control gate is so composed as to cover at least a part of the upper part of the memory gate, in an MNOS structure. CONSTITUTION:Write is performed by impressing a positive high voltage on the memory gate 7 and earthing an n type Si substrate 1, a p-well 2, and a Z region 5. Further, the p-well 2 immediately under the control gate 10a between an X region 3 and an SiO2 film 9 is inverted to n type at the earth level of the X region 3 by impressing a positive low voltage on the control gate 10a, and thereby a high electric field is applied between the memory gate 7 and the p-well 2. Then, electrons transfer from the p-well 2 in the direction of the memory gate 7 through the SiO2 film 9 by tunnel phenomenon, and then are trapped by the electron capture center in the neighborhood of the boundary surface between the SiO2 film 9 and an Si3N4 film 8, resulting in the finish of write. Write inhibition can be performed by supplying the X region 3 with a positive high voltage and earthing the control gate 10a.

Inventors

• 👤 Ryuichi Matsuo
• 👤 龍一 松尾

Bibliographic Details