Read only semiconductor memory device and manufacture thereof

Abstract

Abstract PURPOSE:To reduce the cell occupation area by decreasing the resistance between the drain and a data line by a method wherein a wiring layer made of polycrystalline Si is connected to the drain of an MOS transistor for a memory cell, the end of said layer is extended onto an insulation gate electrode, and the data line is adhered thereon. CONSTITUTION:A field oxide film 20 for element isolation is formed in the periphery of a P type Si substrate 11, and a thin gate oxide film 21 is adhered on the surface of the substrate 11 surrounded by said film. Next, a polycrystalline Si layer 14' containing an impurity is deposited over the entire surface, and at the same time the impurity therein is diffused, thus generating an inversion preventing layer 25 under the film 20. Then, the layer 14' is changed into a word line 14 the gate electrode by patterning. Thereafter, the N<+> type source and drain regions 12 and 13 are formed by ion implantation with said line as a mask, and the word line 14 is covered with an SiO2 film 22. An SiO2 film 23 is produced over the entire surface, an aperture 15 is bored above a region 12, the wiring layer 16 contacting the region 12 is extended onto the word line 14, and the data line 18 is adhered thereon.

Inventors

• 👤 Shoji Ariizumi
• 👤 有泉　「しよう」次
• 👤 Taira Iwase
• 👤 岩瀬　平
• 👤 Fujio Masuoka
• 👤 富士雄 舛岡

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