Patent JPS59101366A successfully refreshed from Google Patents.
← Back to Patent Explorer
JPS59101366A Expired / Lapsed JP ⏱️ 0.0 years remaining

Treating method of mark signal

Assignee: NIREKO KK
•
Filing: 1982-12-02
•
Granted: —
•
Expires: 2002-12-02
📄 Original PDF 🌐 Google Patents 🔄 Sync Now

Abstract

Abstract PURPOSE:To detect highly accurately a mark position undisturbed by errors of detecting output signals of each register mark by detecting rising and falling of output signals and determining arbitrarily this internal division position. CONSTITUTION:Regarding a binarized signal (h) available by means of comparison of mark signal (e) and threshold level (f), its rising and falling are detected by flip-flops F and E and thus, clock-count data are obtained as the time from the starting time given by a gate signal (a). Consequently, for example, the central position of the mark signal, i.e. time at the time of peak position is obtained as (DA+DB)/2 from these data DA and DB. Even if an error happens in each mark signal, a highly accurate positioning is available by a proportional setting of internal dividing point regardless of the aforesaid situation.

Inventors

  • 👤 Atsushi Katada
  • 👤 篤 片田

Bibliographic Details

Application Number —
Jurisdiction JP
Data Source google_patents
Last Synchronized 2026-11-09 15:46
CPC Classifications
B; B41; B41F; B41F33/00; B41F33/0081

Claims Analysis

Total Claims: 0
No claims parsed yet. Click Sync Now above to re-index claims from Google Patents.

References Cited (Backward Citations)

JPS50141965A Cited

USPTO Annuity & Maintenance Windows

Maintenance schedule is calculated for granted US utility patents.

Assigned Categories & Tags

No categories assigned to this patent yet.

Assign Category Tag