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JPS5893343A Expired / Lapsed JP ⏱️ 0.0 years remaining

Forming method for isolation region of semiconductor integrated circuit

Assignee: Toshiba Corp
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Filing: 1981-11-30
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Granted: —
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Expires: 2001-11-30
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Abstract

Abstract PURPOSE:To obtain the isolation region with narrow width by forming a silicon film to the surface of a substrate with a convex section, selectively removing the silicon film coated to the side surface of the convex section and shaping a concave section to the side surface of the convex section through a removed section. CONSTITUTION:The silicon oxide film 2 is formed to the surface of the silicon substrate 1. A polycrystal silicon film 4 is shaped to the whole surface. Boron is implanted in the film 4, and a high-concentration region 5 and a low-concentation region 6 are molded. The region 6 is removed through etching. The concave section 8 is formed through etching through the removed section 7. The region 5 and the film 2 are removed. A silicon oxide film 9 is buried into the substrate 1, and the isolation region is shaped.

Inventors

  • 👤 Hiroshi Momose
  • 👤 百瀬 啓

Bibliographic Details

Application Number —
Jurisdiction JP
Data Source google_patents
Last Synchronized 2026-10-31 22:41
CPC Classifications
H; H10; H10W; H10W10/00; H10W10/01; H10W10/011; H10W10/014; H10W10/10; H10W10/17

Claims Analysis

Total Claims: 0
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References Cited (Backward Citations)

JPS5577134A Cited
JPS5669833A Cited
JPS6219061A Cited

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