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JPS5877328A Expired / Lapsed JP ⏱️ 0.0 years remaining

CMOS integrated circuit device

Assignee: Hitachi Microcomputer System Ltd
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Filing: 1981-11-02
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Granted: —
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Expires: 2001-11-02
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Abstract

Abstract PURPOSE:To perform sufficient aging, by providing a tri-state circuit selectively applying the logical level for aging to an external input terminal. CONSTITUTION:An input signal is inputted to a logical circuit block through an input buffer circuit IB from a terminal IN1-INl. An output signal formed at a logical circuit block LOG through an output buffer circuit OB is outputted from terminals OUT1-OUTm. Terminals IO1-IOn are provided with an input/output buffer circuit TOB comprising a tri-state output buffer circuit TOB and input buffer circuit IB and are used for input and output terminals to a logical circuit block LOG.

Inventors

  • 👤 Yoshikazu Takahashi
  • 👤 良和 高橋
  • 👤 Nobuaki Kitamura
  • 👤 暢章 北村
  • 👤 Makoto Takechi
  • 👤 武智 真

Bibliographic Details

Application Number —
Jurisdiction JP
Data Source google_patents
Last Synchronized 2026-10-31 07:59
CPC Classifications
H; H03; H03K; H03K19/00; H03K19/02; H03K19/173

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