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JPS5856533A Expired / Lapsed JP ⏱️ 0.0 years remaining

Coincidence circuit

Assignee: Toshiba Corp
•
Filing: 1981-09-30
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Granted: —
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Expires: 2001-09-30
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Abstract

Abstract PURPOSE:To prevent a large current from flowing between power supplies, by always inputting a comparison input data to a comparison section and outputting an output of the comparison section in synchronizing with a clock signal. CONSTITUTION:An output signal D1 of an inverter consisting of an N-channel depletion D type transistor(TR)T11 and an N-channel enhancement E type TRT12 and an output signal D2 of an inverter consisting of an N-channel D type TRT13 and an N-channel E type TRT14 are respectively applied to the gate of TRsT16, T15 of a comparison section consisting of N-channel E type TRs. An N-channel D type TRT17 is provided between an output D1 of the comparison section 13 and a power supply VDD, and an N-channel E type TRT18 is provided between the OUT1 and an output terminal OUT2 and a clock signal CK is given to the gate of the TRT18. Even when the TRsT12, T15 turn on or the TRsT14, T16 turn on, the gate potential of the TRT17 is zero and almost no current flows between the power supply VDD and ground. Thus, the heat generation is less and the TRT18 is provided with a holding function of previous data when the signal CK is 0.

Inventors

  • 👤 Jiro Hirahara
  • 👤 平原 治郎

Bibliographic Details

Application Number —
Jurisdiction JP
Data Source google_patents
Last Synchronized 2026-10-31 18:27
CPC Classifications
H; H03; H03K; H03K19/00; H03K19/20; H03K19/21; H03K19/215

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