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JPS584947A Expired / Lapsed JP ⏱️ 0.0 years remaining

Manufacture for buried wiring layer

Assignee: NTT Inc
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Filing: 1981-06-30
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Granted: —
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Expires: 2001-06-30
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Abstract

Abstract PURPOSE:To obtain a flat surfaced multilayer wiring free of disconnections by a method wherein masking layers are formed having wiring patterns on conductive layers buried in an insulting layer and electroless chemical treatment is performed for the masks and conductors. CONSTITUTION:An Al layer C1 is piled on an SiO2 layer B1 on an Si substrate 1. A resist mask M1 is applied for the formation of an insulating layer I1 in an electroless chemical process. The mask M1 is dismantled and a window H12 provided Si3N4 film B12 and an Al layer C12 are successively laid down and a resist mask M12 is selectively provided above the window H12. Electroless chemical process follows for the formation of an insulating layer I12, and a connecting wiring layer W12 is formed. The mask M12 is removed and, again, a window 12 provided Si3N4 film B2 and an Al layer C2 are successively formed to be subjected to electroless chemical treatment for the formation of an insulating layer I2. Then mask M2 is removed. Thus, a flat surfaced multilayer wiring free of burial caused wiring disconnections is obtained.

Inventors

  • 👤 Eiichi Yamamoto
  • 👤 栄一 山本
  • 👤 Hiroaki Nakamura
  • 👤 宏昭 中村

Bibliographic Details

Application Number —
Jurisdiction JP
Data Source google_patents
Last Synchronized 2026-11-09 03:12
CPC Classifications
—

Claims Analysis

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References Cited (Backward Citations)

JPS5232273A Cited

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