Semiconductor integrated circuit

Abstract

Abstract PURPOSE:To improve the utility efficiency of an I/O cell and internal cell by connecting between circuit elements in the I/O cell and between the I/O cells with the same wiring layer, thereby forming a macrocell of the prescribed logic function. CONSTITUTION:An internal cell 1 integrated at the center of a substrate is small in size, while a peripheral I/O cell 3 has high load drive capacity and large size. The first and second wiring layers are connected in the cell and between the cells, and a power source wiring periphery 6-1 is formed with the second wiring layer in the I/O cell region 4. At this time, a multilayer structure vacant region is formed in the region 4 with the power source pattern and the I/O cell group. This is utilized to connect a plurality of I/O cells of the same element configuration via stationary wirings as a macrocell to provide logic function. Then, various logic circuits with more varieties than the conventional one can be formed in the region 4, thereby further improving the utility efficiency of the I/O cell and the internal cell 1.

Inventors

• 👤 Satoru Tanizawa
• 👤 谷澤　哲
• 👤 Katsuharu Mitono
• 👤 水戸野　克治
• 👤 Hitoshi Omichi
• 👤 大道　等

Bibliographic Details