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JPS5844732A Expired / Lapsed JP ⏱️ 0.0 years remaining

Semiconductor device

Assignee: Mitsubishi Electric Corp
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Filing: 1981-09-10
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Granted: —
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Expires: 2001-09-10
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Abstract

Abstract PURPOSE:To reduce the parasitic capacity of a semiconductor device by notching the surface of a metallic base at the parts opposed to the gate and drain electrodes of a semiconductor substrate. CONSTITUTION:The surface of a grounding metallic base 5 is notched at the parts opposed to gate and drain electrodes 3, 4 of a semiconductor substrate 100, thereby expanding a gap 53. Accordingly, the parasitic capacity can be reduced, thereby improving the high frequency characteristics. Excessive solder is absorbed to the notch 53, thereby preventing a shortcircuit with the gate electrode 3. A notch may be formed on the surface of the metallic base opposed to the source electrode 2 according to the disposition of the FET pattern.

Inventors

  • 👤 Yoshinobu Kadowaki
  • 👤 門脇 好伸

Bibliographic Details

Application Number —
Jurisdiction JP
Data Source google_patents
Last Synchronized 2026-11-08 06:11
CPC Classifications
H; H10; H10W; H10W72/00; H10W72/071; H10W72/072; H10W72/07231; H10W72/07236; H10W72/07251; H10W72/20

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