Data processing circuit

Abstract

Abstract PURPOSE:To perform a desired process at a high speed and in an optimum sequence, by deciding the contents to be processed next, from the contents of the present process and the result of the present process. CONSTITUTION:For a data processing circuit which executes a decision process including a conditional process at a high speed, the output 08 given from a latching circuit 5 is fed to a processing circuit 3 to designate the processing contents of the circuit 3. The output 08 is also fed to an input selecting circuit 2, and the circuit 2 selects the data corresponding to the processing contents of the circuit 3 out of the input data 04-06. Thus the output 02 of the circuit 2 is produced and fed to the circuit 3 to be processed and to produce the output 03 of the circuit 3. The output 03 is fed to an ROM 4 along with the output 08 as an address input. Thus an ROM output 07 is obtained. The output 07 is fed to the circuit 5 to produce the output 08. The output 08 designates the selection of the input data and the processing contents of the circuit 3.

Inventors

• 👤 Takao Gotoda
• 👤 後藤田　卓男
• 👤 Tetsumasa Ooyama
• 👤 大山　哲政
• 👤 Akihiko Takada
• 👤 昭彦 高田
• 👤 Hiroyuki Noguchi
• 👤 野口　浩幸

Bibliographic Details