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Patent JPS5833864A successfully refreshed from Google Patents.
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JPS5833864A Expired / Lapsed JP ⏱️ 0.0 years remaining

Semiconductor device

Assignee: Fujitsu Ltd
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Filing: 1981-08-25
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Granted: —
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Expires: 2001-08-25
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Abstract

Abstract PURPOSE:To effectively utilize a layout design by a computer by forming a power source connecting pad region at the corner of the periphery formed with an externally connecting pad region, thereby improving the periodic property of the pattern. CONSTITUTION:A semiconductor device 1 has a basic cell array forming region at the center. A power source pad regions GND, VCC are formed at the corner of the periphery. Input/output buffer regions 4'-1-4'-4' pad regions P'57-P'60, other input/output buffer regions 3-1-3-56 and their pad resions P1-P56 are formed at the periphery except the corners with periodic property. As a result, the layout design by a computer can be effectively utilized, thereby improving the reliability.

Inventors

  • 👤 Satoru Tanizawa
  • 👤 谷澤 哲
  • 👤 Hitoshi Omichi
  • 👤 大道 等
  • 👤 Katsuharu Mitono
  • 👤 水戸野 克治

Bibliographic Details

Application Number —
Jurisdiction JP
Data Source google_patents
Last Synchronized 2026-11-09 07:23
CPC Classifications
H; H10; H10D; H10D84/00; H10D84/90; H10D84/998; H10W; H10W72/00; H10W72/90; H10W70/00; H10W70/60; H10W72/931; H10W72/932

Claims Analysis

Total Claims: 0
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References Cited (Backward Citations)

JPS49131381A Cited

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