Vertical cylindrical mos field effect transistor

Abstract

Abstract PURPOSE:To improve the integration of an MOS field effect transistor and to form a flat structure by forming a source region and a drain region in the end surface of vertical hollow cylindrical insulating layer buried with a gate electrode. CONSTITUTION:An insulating layer 26' formed in a vertical hollow cylindrical shape sequentially with bottom, regions 25, 22 to become drain or source formed in contact with or above the outside surface or at the bottom or under the vertical hollow cylinder of the layer 26', and a gate electrode 28 burying a vertical hollow cylindrical insulating layer 26' with a bottom and flat with a substrate surface insulating layer 26. The channel length L3 of the transistor becomes the length of the channel formed vertically with good controllability and short. The size becomes small due to the vertical cylindrical shape, and the integration can be improved.

Inventors

• 👤 Yuji Furumura
• 👤 雄二 古村

Bibliographic Details