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JPS583200A Expired / Lapsed JP ⏱️ 0.0 years remaining

Memory check system

Assignee: Fujitsu Ltd
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Filing: 1981-06-30
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Granted: —
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Expires: 2001-06-30
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Abstract

Abstract PURPOSE:To improve the reliability of check, by accumulating the number of the content of the same bit at the same bit location, calculating the accumulated value and collating the value with the check value. CONSTITUTION:In checking a memory 2, 8-bit or B0-7 of each address in a program memory area 2a is read out altogether and stored in a register 3. A bit register 5 detects if the content of a specific bit in the register 3 is at ''1'' and outputs an addition signal S1 to an adder 6 only at ''1''. The adder 6 reads out a register 7 with the signal S1, adds ''1'' and stores the value to the register 7 as an accumulated value T. All the addresses are checked and outputted to a check circuit 9. The check circuit 9 reads out a check value stored in a check memory area 2b for collation. When the check value of each bit location and the value T are coincident, it is decided that the check value is correct.

Inventors

  • 👤 Masami Yamamoto
  • 👤 正己 山本
  • 👤 Shuhei Inamori
  • 👤 稲森 洲平

Bibliographic Details

Application Number —
Jurisdiction JP
Data Source google_patents
Last Synchronized 2026-10-29 20:01
CPC Classifications
G; G06; G06F; G06F11/00; G06F11/07; G06F11/0703; G06F11/0751; G06F11/0763

Claims Analysis

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References Cited (Backward Citations)

JPS541422A Cited

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