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JPS581890A Expired / Lapsed JP ⏱️ 0.0 years remaining

Driving system of dynamic semiconductor storage device

Assignee: Fujitsu Ltd
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Filing: 1981-06-29
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Granted: —
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Expires: 2001-06-29
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Abstract

Abstract PURPOSE:To reduce the power consumption, by actuating only the word decoder part where the desired row exists in the access active mode. CONSTITUTION:In the access active mode, an address buffer 5R' sets either one of the row address clock signals RAC1 and RAC2 at 1 and the other at O based on the address signals A7 and A7'. As a result, either one of the row group circuits 6R-1 and 7R-1 and a memory block BK1 or the row group circuits 6R-2 and 7R-2 and a memory block BK2 works. In the refresh active mode, both signals RAC1 and RAC2 are set at 1 regardless of the signal A7 or A7'. As a result, the circuits 6R-1, 6R-2, 7R-1, 7R-2 and blocks BK1 and BK2 work simultaneously. This reduces the power consumption of a row decoder. For instance, in the case of 2 blocks, the power consumption can be reduced down to about 1/ 2 for the circuits ranging from a word line driver through a sense amplifier.

Inventors

  • 👤 Yoshihiro Takemae
  • 👤 義博 竹前
  • 👤 Tomio Nakano
  • 👤 中野 富男

Bibliographic Details

Application Number —
Jurisdiction JP
Data Source google_patents
Last Synchronized 2026-11-05 23:33
CPC Classifications
G; G11; G11C; G11C11/00; G11C11/21; G11C11/34; G11C11/40; G11C11/401; G11C11/406; G11C11/4063; G11C11/407

Claims Analysis

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References Cited (Backward Citations)

JPS57203290A Cited

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