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JPS58176752A Expired / Lapsed JP ⏱️ 0.0 years remaining

Fetching system of macroinstruction

Assignee: Fuji Electric Co Ltd
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Filing: 1982-04-10
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Granted: —
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Expires: 2002-04-10
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Abstract

Abstract PURPOSE:To increase the fecthing speed of a macroinstruction, by storing the programs to different memories in response to the executing frequency of these programs. CONSTITUTION:An applied program comprising macroinstruction groups is stored in a main memory 1, and the memory 1 is connected to a system bus 3 via a memory controller 2. A control program of OS comprising macroinstruction groups and having a high executing frequency is stored in a high-speed memory 4 and then connected to a bus 3 via a memory controller 5. A fetching destination designating register 6 designates the fetching of a macroinstruction of the memory 1 or 4. The output lines S1 and S2 of the register 6 are controlled to be set at logic 1 with a microinstruction. Then a selector 7 selects a register 10 to which the instruction fed from the memory 1 is transferred, and this instruction is fed to a decoder 8. When a macroinstruction which calls out a control program is fetched, the lines S1 and S2 are set at logic O. Then the selector 7 selects a register 12 to which the instruction from the memory 4 is transferred. In this case, an interruption, mask register 13 is locked, and an external interruption request is masked.

Inventors

  • 👤 Masami Takada
  • 👤 高田 正実

Bibliographic Details

Application Number —
Jurisdiction JP
Data Source google_patents
Last Synchronized 2026-11-05 19:47
CPC Classifications
G; G06; G06F; G06F9/00; G06F9/06; G06F9/46; G06F9/48; G06F9/4806; G06F9/4812

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