Solid-state image pickup device

Abstract

Abstract PURPOSE:To make signal processing easy and to increase the sensitivity, by providing a transfer gate and a storage capacitor between a horizontal switch MOS transistor (TR) and a vertical signal line and connecting a connecting point between the gate and the TR to a reset gate. CONSTITUTION:Before signals stored in a photodiode 11, pulses phit, phis, phiR are sequentially turned on, a virtual signal is picked up from a reset TR17, and the potential under the storage capacitor 16 is reset to a voltage VR. Further, pulses phiv, phit, phis, phix are sequentially turned on and signals are sent to a CTD storage gate 13. When the pulse Ot is turned on, the voltage VR is set so as to flow charges to a vertical signal line 14, the potential of the line 14 is decreased and the transfer gate is in a sufficiently conductive state. Succeedingly, when the pulse phis is turned on, the charges flowing before and the signal charges are shifted to the gate 16 in a short time. Thus, through the simple signal processing, the device having high sensitivity is formed.

Inventors

• 👤 Masakazu Aoki
• 👤 久保征治
• 👤 Kayao Takemoto
• 👤 青木正和
• 👤 Shinya Oba
• 👤 大場信彌
• 👤 Seiji Kubo
• 👤 竹本一八男

Bibliographic Details