Semiconductor device with multilayer channel

Abstract

Abstract PURPOSE:To facilitate the inspection and visual observation of a highly integrated circuit by sequentially and perpendicularly crossing channels in which a plurality of wires are regularly arranged in parallel with each other in a wiring direction, laminating three layers and more and displacing the central positions of the wires of the upper and lower channels extending in the same direction. CONSTITUTION:Wiring channels 101-104 of a logic circuit or the like are, for example, formed in four layers through insulating layers. The centeral position of the wire of the third layer 103 of the channel extending in the same direction is, for example, displaced, even when equal at the wiring internal to the first layer 101 or the third layer 103 is formed at a wide interval, to the position between the wires of the first layer 101. The through holes for connecting between the respective layers are formed at the crossing position of the two adjacent layers. Wires 312A, 312B on the same channel of the second layer 102 are, for example, connected to the wire 311A of the first layer 101 and the wire 302 of the third layer 103 through the through holes 301, 302. IN this manner they can be visually observed without being disturbed by the upper layer wire, and when the insulating layer is damaged, it can be inspected by contacting a probe to the lower layer.

Inventors

• 👤 Akira Masaki
• 👤 Shinji Katono
• 👤 Tsuneyo Chiba
• 👤 Tetsuya Saito

Bibliographic Details