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JPS5757022A Expired / Lapsed JP ⏱️ 0.0 years remaining

Automatic equalizer

Assignee: NEC Corp
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Filing: 1980-09-24
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Granted: —
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Expires: 2000-09-24
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Abstract

Abstract PURPOSE:To hold a normal lead-in state stably, by adding a control circuit, which detects a false lead-in state to reset tap coefficients, to an automatic equalizer. CONSTITUTION:A delayed signal and a signal which is not delayed are added by an adding circuit 7. The output of the adding circuit 7 is inputted to a discriminating circuit 8 having two threshold levels. A counter 9 is counted up by the output of the discriminating circuit 8. When counted up n-number times, the counter 9 discriminates false lead-in of an automatic equalizing circuit 2 and outputs a signal (f) which resets tap coefficients of the automatic equalizing circuit 2 to control a delay circuit, and every tap coefficient is reset to the initial state, and the counter itself is reset also.

Inventors

  • 👤 Fuji Kanemasa

Bibliographic Details

Application Number —
Jurisdiction JP
Data Source google_patents
Last Synchronized 2026-11-05 23:32
CPC Classifications
H; H04; H04L; H04L25/00; H04L25/02; H04L25/03; H04L25/03006; H04L25/03012; H04L25/03019; H04L25/03038

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