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JPS5755597A Expired / Lapsed JP ⏱️ 0.0 years remaining

Solid state digital sound recording circuit

Assignee: Oki Electric Industry Co Ltd
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Filing: 1980-09-19
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Granted: —
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Expires: 2000-09-19
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Abstract

Abstract PURPOSE:To immediately select a desired contents of sound recording, by presetting an optional address from outside to an address counter that designates the write and read addresses of a semiconductor memory functioning as a recording medium. CONSTITUTION:The aural input signal supplied through an input terminal 11 is converted into a digital signal through a sample holding circuit 12 and an A/D converter 13 to be recorded to a digital semiconductor memory 14. An address counter 19 advances and designates the write and read addresses of a memory 14 with every step to give a control so that the aural input signals are stored and read successively to and out of the memory 14. A semiconductor memory 22 that stores the set address plus a comparator 21 that monitors the address are provided to set the address of the counter 19 and then stops the counting at a certain address. The digital signal read out of the memory 14 is turned into an aural signal through a D/A converter 15 and a low pass filter 16.

Inventors

  • 👤 Koichi Nakagawa

Bibliographic Details

Application Number —
Jurisdiction JP
Data Source google_patents
Last Synchronized 2026-11-03 08:31
CPC Classifications
G; G11; G11C; G11C7/00; G11C7/16; G11C2207/00; G11C2207/16

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Total Claims: 0
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