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JPS5740945A Expired / Lapsed JP ⏱️ 0.0 years remaining

Integrated circuit device

Assignee: Fujitsu Ltd
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Filing: 1980-08-25
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Granted: —
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Expires: 2000-08-25
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Abstract

Abstract PURPOSE:To increase a packaging density, by a method wherein integrated circuits are arranged at the upper and the lower surface of an insulating supporter and flip chip bonding connection sections are formed on a part of connecting terminal rows and the remaining connection terminal rows and wire bonding pads are connected with wires. CONSTITUTION:An integrated circuit 2 is provided at the lower surface of an integrated circuit chip 1 and an integrated circuit 5 is provided at the upper surface of the integrated circuit chip 1 to form flip chip bonding connection sections 3, 4 on the integrated circuit 2 and connection terminals 13, 14 are arranged at a three-layer laminating supporter 8 at the positions corresponding to terminals 3, 4 and the connection terminals 13, 14 are connected to external leads 9, 10. The wire bonding pads of the integrated circuit 5 are connected to connection terminals 15, 16 provided at the upper opposite sides of the concave sections of the supporter 8 by means of wires 17, 18 and the connection terminals 15, 16 are connected to external lead 9, 11 to seal them with a cap 12. This method permits packaging twice as high in density.

Inventors

  • 👤 Hidehiko Akasaki
  • 👤 Eiji Aoki

Bibliographic Details

Application Number —
Jurisdiction JP
Data Source google_patents
Last Synchronized 2026-10-30 23:18
CPC Classifications
H; H10; H10W; H10W72/00; H10W72/071; H10W72/072; H10W70/00; H10W70/60; H10W70/67; H10W70/68; H10W70/682; H10W70/685; H10W72/07231; H10W72/07236; H10W72/07251; H10W72/075; H10W72/07551; H10W72/20; H10W72/251; H10W72/50; H10W72/531; H10W72/536; H10W72/5363; H10W72/851; H10W72/874; H10W72/879; H10W90/00; H10W90/701; H10W90/751; H10W90/754

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