Semiconductor device

Abstract

Abstract PURPOSE:To reduce the size and to improve the function of a semiconductor device having a logic circuit using master-slice system by arraying the cell of random logic circuit with memory cell and input/output buffer on the same chip. CONSTITUTION:Unit cells 1-24 of random logic circuit are arrayed on a master-slice semiconductor chip 1, and are connected via address bus line 5 led from an address buffer 3 of a memory 2 and output bus line 6 and metallic wire fed via an output buffer 4 from the memory. An external circuit device is connected via bonding wire through the bonding pad at one ends of the address bus line 5 and the output bus line 6. Since the memory and its peripheral logic circuit can be arranged on 1 chip, it can reduce the size in connection and mounting and can enhance the integration.

Inventors

• 👤 Fumitaka Chiba

Bibliographic Details