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Patent JPS5694589A successfully refreshed from Google Patents.
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JPS5694589A Expired / Lapsed JP ⏱️ 0.0 years remaining

Memory device

Assignee: NEC Corp
•
Filing: 1979-12-27
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Granted: —
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Expires: 1999-12-27
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Abstract

Abstract PURPOSE: To enable to control the shift length of X and shift registers freely, by giving the function setting the initial position to the said shift registers. CONSTITUTION: X shift register (X-SR)22 and Y shift register (Y-SR)23 are provided to select the memory 11 arranged in matrix in M-row and N-column, and in synchronizing with the shift input ϕ externally, the shift pulse ϕ of X-SR22 is produced every time, and when X-SR22 is circulated, one shift pulse ϕ of Y-SR23 is generated and Y-SR23 is advanced by one. The initial set value is set to the initial (SR length) set circuit 81 externally, the said shift pulse ϕ is counted by a counter 51, the value of the counter 51 is detected 52 for the agreement with the value of the said initial set circuit 81, the initial set signal INTO(INTX, INTY) is produced to set X-SR22 and Y-SR23 to a decided position, allowing to obtain the shift registers of a given length. COPYRIGHT: (C)1981,JPO&Japio

Inventors

  • 👤 Shigeki Matsue

Bibliographic Details

Application Number —
Jurisdiction JP
Data Source google_patents
Last Synchronized 2026-11-08 04:42
CPC Classifications
G; G11; G11C; G11C7/00; G11C7/10; G11C7/1006; G11C19/00; G11C7/1015; G11C7/1018; G11C8/00; G11C8/04

Claims Analysis

Total Claims: 0
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References Cited (Backward Citations)

JPS49128644A Cited
JPS5391540A Cited
JPS54114053A Cited

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