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JPS5693331A Expired / Lapsed JP ⏱️ 0.0 years remaining

Manufacture of semiconductor device

Assignee: Fujitsu Ltd
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Filing: 1979-12-26
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Granted: —
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Expires: 1999-12-26
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Abstract

Abstract PURPOSE:To attempt the elevation of precision of the patterning of the semiconductor device to be formed self-alignmently by a method wherein a positive type resist mask is formed in a region remaining a negative type resist mask in another region. CONSTITUTION:An MIS type semiconductor element region 14 and a circumferential circuit region 15 are formed on an Si substrate, and a CVD polycrystalline Si layer 1 is formed on the surface. Negative type resist masks 11, 11' are applied respectively on the regions 14, 15, and the patterning of gate electrodes 16, 17 is performed by plasma etching using CF4. Then a positive type resist mask 18 is accumulated selectively, the SiO2 film 3 is etched by plasma of CHF3 and the patterning of an under part electrode 2 is performed by plasma of CF4 again. By this constitution, the deformation or the discrepancy of position of the negative type mask is not generated when the positive type mask is to be formed, the patterns to be formed self-alignmently in accumulation can be formed together by dry etching, and the highly precise and highly integrated pattern can be obtained.

Inventors

  • 👤 Keiji Nishimoto

Bibliographic Details

Application Number —
Jurisdiction JP
Data Source google_patents
Last Synchronized 2026-11-02 08:54
CPC Classifications
H; H10; H10P; H10P76/00; H10P76/20

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