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JPS5655075A Expired / Lapsed JP ⏱️ 0.0 years remaining

Semiconductor device

Assignee: Panasonic Holdings Corp
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Filing: 1979-10-12
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Granted: —
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Expires: 1999-10-12
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Abstract

Abstract PURPOSE:To contrive the enhancement in the performance of a semiconductor device by forming a channel at the portion isolated from the boundary between an island region and an insulating layer, thereby increasing the mobility of carriers in the channel. CONSTITUTION:There is formed an insulating layer 22 which surrounds the N type silicon monocrystalline island region 11, the bottom and side surfaces thereof. This means that P type silicon layer formed in the N type silicon monocrystal is performed in multiple pores and is then oxidized as an SiO2 layer. For example, a high density N<+> type silicon substrate 33 having a specific resistance of 0.01OMEGAcm is formed, and an Au electrode 10 which makes contact ohmically with this through Au-Si eutectic crystal is formed thereat. Further, high density N<+> type source region 44, drain region 55 and P type gate region 66 are formed. When a voltage which is negative with respect to the source 44 is applied to the electrode 10 provided on the substrate 33, a depletion layer 99 is expanded in the bulk of the island 11 from the boundary 88 in the electric field generated between the substrate 33 and the region 11, and a channel is formed between the layer 77 and the layer 99. Accordingly, the layer 99 is expanded in the boundary 88 by the bias voltage applied to the electrode 10, and is formed in the bulk of the island region 11 having high channel mobility.

Inventors

  • 👤 Seiji Onaka
  • 👤 Kosei Kajiwara
  • 👤 Tatsunori Nakajima
  • 👤 Kazutoshi Nagano
  • 👤 Kosuke Yasuno

Bibliographic Details

Application Number —
Jurisdiction JP
Data Source google_patents
Last Synchronized 2026-10-31 01:17
CPC Classifications
H; H10; H10D; H10D30/00; H10D30/80; H10D30/83

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