← Back to Patent Explorer
JPS564281A Expired / Lapsed JP ⏱️ 0.0 years remaining

Insulated gate type field effect transistor

Assignee: Toshiba Corp
•
Filing: 1979-06-25
•
Granted: —
•
Expires: 1999-06-25
📄 Original PDF 🌐 Google Patents 🔄 Sync Now

Abstract

Abstract PURPOSE:To provide an insulated gate type field effect transistor having high withstand voltage by forming the transistor (IGFET) of a circular drain region, a region having the same conducting type as the drain region and making contact therewith low impurity density, and an annular source region having the same conducting type as the drain region spaced therefrom. CONSTITUTION:A circular N<+>-type drain region 22 is diffused at the center of a P-type semiconductor substrate 21, and an N<->-type annular region 23 having lower density in impurity than the region 22 and shallower diffusing depth in N<->-type annular region 23 than the region 22 is formed around the region 22. Then, a similarly annular N<+>-type source region 24 to the substrate 21 spaced from the region 23 is diffused in the substrate 21, and a similarly annular gate electrode 25 is mounted through an annular gate oxide film 26 between the regions 22 and 24 to form an IGFET. When an ion is implanted to the outside of the region 24 to form a P<+>-type channel cut region 27 and a thick field oxide film is coated thereon in this manner, no impurity density is altered in the respective regions to eliminate the decrease of the withstand voltage in the transistor.

Inventors

  • 👤 Hiroshi Iwahashi
  • 👤 Masamichi Asano

Bibliographic Details

Application Number —
Jurisdiction JP
Data Source google_patents
Last Synchronized 2026-11-08 14:53
CPC Classifications
H; H10; H10D; H10D62/00; H10D62/10; H10D62/124; H10D62/126; H10D30/00; H10D30/60; H10D30/601; H10D30/603; H10D64/00; H10D64/111

Claims Analysis

Total Claims: 0
No claims parsed yet. Click Sync Now above to re-index claims from Google Patents.

References Cited (Backward Citations)

No citation records indexed.

USPTO Annuity & Maintenance Windows

Maintenance schedule is calculated for granted US utility patents.

Assigned Categories & Tags

No categories assigned to this patent yet.

Assign Category Tag