Picture signal processing unit

Abstract

Abstract PURPOSE:To make it possible to prevent generation of a false outline even for a small number of bits, by superposing a fixed-frequency pulse signal onto the picture signal and by adjusting the superposed signal so that its peak-to-peak value may be the half of one quantization step approximately. CONSTITUTION:Picture signal S1 is supplied to adder 8 through buffer amplifier 6, and fixed-frequency pulse signal S2 is superposed onto picture signal S1 by adder 8, and the output of adder 8 is supplied to A/D converter 9 and is converted to a binary code with one sample of three bits. Synchronizing signal P1 separated by synchronizing separating circuit 7 is supplied to pulse generator 10 and motor drive circuit 11. Pulse generator 10 generates pulse signal S2 for adder 8, sampling pulse S3 for A/D converter 9, a clock pulse, and switching pulse S4. Pulse signal S2 has the half frequency of sampling pulse S3 and phase difference 90 deg. and is adjusted by level adjusting equipment 13 so that the peak-to-peak value may be the half of one quantization step in A/D converter 9.

Inventors

• 👤 Sadao Maeyama
• 👤 Seisuke Suzuki

Bibliographic Details