Circuit for generating substrate bias voltage
Abstract
Abstract PURPOSE: To prevent the decrease in the operation speed and the erroneous operation of an IC circuit by eliminating the variation in a bias voltage in a semiconductor substrate due to the variation in a power supply voltage. CONSTITUTION: An oscillator ciruit 1 is constituted by a ring oscillator wherein an odd number of inverters IV 1 ∼IV 5 are cascaded and the output from the final stage inverter IV 5 is fedback to the first stage inverter IV 1 . a rectifier circuit 2 is constituted by: a capacitor C 1 whcih is connected between an output line L 1 and A line L 2 ; an enhancement-mode MISFET Q 1 , wherein the gate and the drain are connected to the line L 2 and the source is connected to the grouning point GND of the circuit; an enhancement-mode MISFET Q 2 , wherein the source is connected to the line L 2 and the gate and the drain are connected to the line VBB; and a resistor R 1 with the relatively high resistance value, which is connected between the line VBB and the grounding point GND. COPYRIGHT: (C)1981,JPO&Japio
Inventors
- 👤 Noburo Tanimura
- 👤 Kotaro Nishimura
- 👤 Norimasa Yasui
Bibliographic Details
Claims Analysis
Total Claims: 0References Cited (Backward Citations)
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