Field-effect transistor manufacturing process

Abstract

Abstract PURPOSE:To improve integration density, by achieving contact formation of a source or a drain or of the both by self-alignment, so that spare spaces between a gate electrode and the source and drain can be reduced to either one of these. CONSTITUTION:A thick field oxide membrane 2 is formed on a surrounding section of an Si substrate 1, a thin gate oxide membrane 3 is provided in the center section on the surface of the substrate 1 surrounded by the membrane 2, and on the top of this a gate electrode 4 consisting of an amorphous Si is attached. And then, by heat-treatment, top layer section of the electrode 4 is turned into an oxide membrane 5, an impurity-containing amorphous Si layer 6 is made to grow on an entire surface including the membrane 5, and heat-treatment is conducted to disperse the impurity in the membrane 6, so that a source region 7 and a drain region 8 are formed on the both sides of the electrode 4. And then, an oxidation preventing mask 9 is provided on the region 7 or the region 8, an exposed layer 6 is selectively oxidized to be turned into an oxide membrane 17, the mask 9 is removed and an aluminum electrode 11 is attached onto the remaining amorphous layer 6.

Inventors

• 👤 Ken Uchida
• 👤 Tatsumi Shirasu

Bibliographic Details