Sequence controller

Abstract

Abstract PURPOSE:To bring a controlled system, which has an input short or long in the on time of a contact, under the control of one sequence controller, by discriminating the time interval of a timer interruption from the most significant digit bit flag of the starting address in a memory. CONSTITUTION:The output of oscillator 10 is frequency-divided by counter 10 to generate pulse signal S1 of 5ms, for example, in time interval, which is further frequency-divided by poststage counter 11 to generate pulse signal S2 of 30ms in time interval. As for period-selecting flags for a table in a memory, the flag which actuates the most significant digit bit of the starting address of each block in 5ms is set to ''1'', and the flag starting it in 30ms is also set to ''0''. Only when a processor is to read the period of a timer interruption, an input signal to gate terminal G is held at the low level and which interruption time interval is the corresponding interruption of the timer interruption period is discriminated and fetched in the processor. Consequently, a controlled system which has an input short in the ON time of a contact or requires a high processing rate and another controlled system are brough under the sequence control of one controller.

Inventors

• 👤 Shiro Tagawa

Bibliographic Details