High withstand voltage mos transistor

Abstract

Abstract PURPOSE:To eliminate the occurrence of an electric field concentration in the high withstand voltage MOS transistor by forming a reverse conductivity type region directly under the boundary between a gate insulating film and a field insulating film, thereby eliminating a depletion layer in a semiconductor substrate. CONSTITUTION:A P type channel region 18 is diffused in an N type silicon substrate 17 which serves as a drain region. In addition, a P type diffusion region 19 is formed on the boundary between the gate insulating film 26 and the field insulating film 25. N<+> type source region 20 and N<+> type drain electrode pickup region 21 are formed by diffusion. Further, an aluminum gate electrode 23, an aluminum source electrode 22 and an aluminum drain electrode 24 are formed. The P type diffusion regions 18 and 19 are connected to an aluminum wiring so that they may have the same potential. Thus, it is possible to avoid the concentration of the electric field, even if a high voltage were applied to between the source electrode 22 and the drain electrode 24, and realize a high withstand voltage MOS transistor.

Inventors

• 👤 Jun Ueda
• 👤 Kuniki Owada

Bibliographic Details