Data transfer system for data process system
Abstract
Abstract PURPOSE: To decrease greatly the time required for the data transfer between the main memory and the input/output device by applying the DMA system, and also to increase greatly the quantity of the data transfer. CONSTITUTION: In case a certain data to be transferred and displayed exists in the continuous address regions AR1, AR2WARn on main memory 2, the head addresses of these regions are referred to as DA1, DA2WDAn along with the number of the transfer data of these regions referred to as DC1, DC2WDCn respectively. Thus these head addresses and the number of the transfer data are made into sets to form table TB which is written into serial address region SR of main memory 2. Prior to the start of DMA, head address TA and its data block number TC of SR are sent to interface circuit 3 via data bus 6 and the program control of processor 1. Accordingly, circuit 3 draws in table TB. COPYRIGHT: (C)1980,JPO&Japio
Inventors
- 👤 Takakazu Funo
- 👤 Takeshi Endo
- 👤 Kunihiro Okada
- 👤 Yasutaka Shibuya
Bibliographic Details
Claims Analysis
Total Claims: 0References Cited (Backward Citations)
No citation records indexed.
USPTO Annuity & Maintenance Windows
Maintenance schedule is calculated for granted US utility patents.