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JPS5595356A Expired / Lapsed JP ⏱️ 0.0 years remaining

Semiconductor device

Assignee: Fujitsu Ltd
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Filing: 1978-12-28
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Granted: —
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Expires: 1998-12-28
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Abstract

Abstract PURPOSE:To control current amplification factor of a vertical type pnp-transistor, by forming a p<+>-type buried-in layer on a p-type semiconductor substrate by ion injection, and adjusting the climbing of the p<+>-type buried-in layer when an n-type layer is grown on it. CONSTITUTION:A p<+>-type buried-in layer 2 is diffused by ion injection in p<+>- type Si substrate 1, which is to become a collector. An n-type epitaxial layer 3 is grown on the entire surface, and at the same time, p<+>-type climb layer 4 is formed by causing layer 2 to climb in layer 3. Next, following the usual transistor manufacturing process, V-groove 4 reaching substrate 1 is cut, and this is filled with polycrystalline Si layer 8. An n<+>-type base region 10 and p<+>-type emitter region 11 are formed by diffusion in island region 6 separated from layer 3, and thereby a vertical pnp-transistor is formed. In this structure, since the current amplification factor is determined by the thickness of layer 3, the depth of region 11 and the amount of climb h of layer 4, an optimum amplification factor can be obtained by adjusting the dose region of layer 2, and temperature and time of heat treatment.

Inventors

  • 👤 Kazuo Tanaka

Bibliographic Details

Application Number —
Jurisdiction JP
Data Source google_patents
Last Synchronized 2026-11-08 16:15
CPC Classifications
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References Cited (Backward Citations)

JPS5074983A Cited
JPS5260078A Cited

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