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JPS5565458A Expired / Lapsed JP ⏱️ 0.0 years remaining

Memory cell

Assignee: NEC Corp
•
Filing: 1978-11-10
•
Granted: —
•
Expires: 1998-11-10
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Abstract

Abstract PURPOSE:To increase the capacitance per unit area, by using, as the film to insulate the capacitor unit, an film having a specific inductive capacity higher than that of SiO2 and providing below the insulating film a region of conduction type opposite to that of the substrate. CONSTITUTION:Field oxide film 21 is formed on p-type Si substrate 20, this is coated with Si3N4 film 22, and by selectively injecting ions, n-type reversed layer 23 is formed. The amount of the dose is determined so that the threshold voltage is made sufficiently low in consideration of the threshold voltage variation due to the electrons arrested by the Si3N4 film. Next, a phosphorus-added poly-Si film is formed, and by selectively etching this, gate electrode 25 of the capacitor unit and insulating film 24 are formed, and these are covered with SiO2 film 26. Next, transfer gate electrode 27 of phosphorus-added poly-Si is selectively formed. n<+>-Layer 28 is formed by opening film 26, and this is made into the data line. After covering the structure with phosphorus-added SiO2 film 29, and by opening a window, Al wiring 30 is formed and it is made into the word line. In this structure, since the capacitance per unit area is increased, the area to be occupied by the capacitor unit can be reduced so that a high density memory device can be constructed.

Inventors

  • 👤 Takashi Yamanaka
  • 👤 Taiichi Inoue

Bibliographic Details

Application Number —
Jurisdiction JP
Data Source google_patents
Last Synchronized 2026-10-30 06:33
CPC Classifications
H; H10; H10B; H10B12/00; H10B12/30

Claims Analysis

Total Claims: 0
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References Cited (Backward Citations)

JPS51148388A Cited
JPS538088A Cited
JPS5359384A Cited
JPS53112686A Cited

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