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JPS5523633A Expired / Lapsed JP ⏱️ 0.0 years remaining

Burst gate pulse generation circuit

Assignee: Toshiba Corp
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Filing: 1978-08-07
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Granted: —
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Expires: 1998-08-07
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Abstract

Abstract PURPOSE: To possibly suppress the width of dispersion and to enable circuit integration, by introducing the burst gate pulse in which the timing of leading and trailing is controlled with the output counting the clock pulse based on the horizontal synchronizing signal. CONSTITUTION: The burst gate pulse generation circuit consists of the clock pulse generator 11, counter circuit 12, and timing control unit 13. The pulse 4μ sec. in width in synchronizing with the trailing of the horizontal synchronizing signal is introduced as the pulse BGP for burst gate at the Q 3 output terminal of FF 3 of the control unit 13. Since the pulse width of BGP can not be more than 4μ sec., it can not reach the video signal section due to dispersion and the problem such as broad color unevenness can be solved. Further, since the circuit 12 and the control unit 13 consist of FF 1 to FF 3 , circuit integration can be made. COPYRIGHT: (C)1980,JPO&Japio

Inventors

  • 👤 Yasunari Arafune

Bibliographic Details

Application Number —
Jurisdiction JP
Data Source google_patents
Last Synchronized 2026-10-30 09:43
CPC Classifications
—

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