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JPS5499531A Expired / Lapsed JP ⏱️ 0.0 years remaining

Semiconductor memory unit

Assignee: NEC Corp
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Filing: 1978-01-12
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Granted: —
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Expires: 1998-01-12
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Abstract

Abstract PURPOSE:To secure the writing and deletion with the low voltage by providing a single conducting region of a high density around the reverse conducting region inside the substrate and thus to realize both the high integration degree and high performance without increasing the times of the photo etching process. CONSTITUTION:The semiconductor nonvolatile memory element contains n<+> diffusion layer 2 and 2' of the source and drain on P<-> semiconductor substrate 1' of a low impurity density, and P<+> diffusion layer 10 and 10' are formed around layer 2 and 2'. These n<+> and p<+> diffusion layers are formed through the diffusion self- matching via the same aperture part of the source and drain, thus eliminating the extra photo etching process for formation of the p<+> diffusion layer. Furthermore, the p<+> diffusion layer covers not only the drain but the source diffusion layer so that the punch-through phenomenon can be prevented. As a result, the element featuring a small channel length becomes possible easily, realizing a high degree of integration and the high performance.

Inventors

  • 👤 Keizo Kobayashi
  • 👤 Kuniyuki Hamano
  • 👤 Minetoshi Asaka

Bibliographic Details

Application Number —
Jurisdiction JP
Data Source google_patents
Last Synchronized 2026-11-03 16:45
CPC Classifications
H; H10; H10D; H10D30/00; H10D30/60; H10D30/68; H10D30/681

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