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JPS5494846A Expired / Lapsed JP ⏱️ 0.0 years remaining

Input and output control unit

Assignee: Hitachi Ltd
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Filing: 1978-01-11
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Granted: —
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Expires: 1998-01-11
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Abstract

Abstract PURPOSE: To enable quick error recovery, even if failure is taken place during the output operation of the input and output unit, by using each data buffer in the input and output controller as if they were separate input and output units with control. CONSTITUTION: Specific device address is given to the buffers 22,22' for data transfer with the host system 1, and the means determining the buffer used with software is provided for the channel interface unit 21. When the unit address A is started and data is transferred to the buffer 22, the transfer end report is fed to the host system 1 and the printer 3 makes printing. The host system 1 receiving the end of transfer reports starts the unit address B, and the data at the next page is transferred to buffer 22'. When output is obtained with the printer 3, print end report is fed to the system 1. COPYRIGHT: (C)1979,JPO&Japio

Inventors

  • 👤 Mitsuhiro Yamaga

Bibliographic Details

Application Number —
Jurisdiction JP
Data Source google_patents
Last Synchronized 2026-11-04 17:25
CPC Classifications
—

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