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Patent JPS5480086A successfully refreshed from Google Patents.
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JPS5480086A Expired / Lapsed JP ⏱️ 0.0 years remaining

Mask aligner

Assignee: Hitachi Ltd
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Filing: 1977-12-09
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Granted: —
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Expires: 1997-12-09
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Abstract

Abstract PURPOSE: To diversify the control modes by securing the independent operation for the adhesive force and the sucking force with installation of the 1st and 2nd vent hole groups to perform the blow-up and suction at the center and circumference parts each of the semiconductor wafer. CONSTITUTION: The 1st vent hole group 10a and 2nd hole group 10b are provided to wafer chuck main body 10 to blow up and suck the center part of semiconductor wafer 15 and the circumference part of wafer 12 respectively. Then wafer 12 is put on body 10, and exposure glass mask 14 containing the pattern of Cr or the like on the surface to be adhered to wafer 12 is put on wafer 12. Thus, the light is irradiated on the resist exposure surface of wafer 12. In this case, hole group 10a and 10b are controlled independently by means of switch unit 16 which is controlled by control system 18, electromagnetic valve 24 and 26 plus pipe arrangement 20 and 22. Thus, wafer 12 is adhered to mask 14 over the entire surface. In this way, both printing and exposure of the pattern becomes possible with a high resolution. COPYRIGHT: (C)1979,JPO&Japio

Inventors

  • 👤 Hiroshi Nishizuka
  • 👤 Susumu Komoriya
  • 👤 Kiyoshi Yoshida
  • 👤 Hiroshi Maejima

Bibliographic Details

Application Number —
Jurisdiction JP
Data Source google_patents
Last Synchronized 2026-11-09 20:52
CPC Classifications
—

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