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JPS52129337A Expired / Lapsed JP ⏱️ 0.0 years remaining

Memory circuit

Assignee: Hitachi Ltd
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Filing: 1976-04-23
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Granted: —
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Expires: 1996-04-23
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Abstract

Abstract PURPOSE:To obtain a multi-function semiconductor memory circuit, which is capable of performing writing or reading of the data of more than two systems through connection of the data and address lines of more than two systems to 1bit memory cell as well as performing reducing simultaneously with writing.

Inventors

  • 👤 Hideo Nakamura
  • 👤 Toshiro Tsukada

Bibliographic Details

Application Number —
Jurisdiction JP
Data Source google_patents
Last Synchronized 2026-11-02 11:14
CPC Classifications
G; G11; G11C; G11C8/00; G11C8/16

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