JPS4843301A - - Google Patents

Abstract

Abstract 1404007 Secret transmission R F KOCH 15 Aug 1972 [28 Sept 1971] 37966/72 Heading H4R In apparatus for independently modifying the speed and pitch of A.C. signals, e.g. representing speech or music, the incoming signals are divided into successive segments which are temporarily stored and portions of the stored segments are discarded or repeated during read-out. As shown in Fig. 4, an incoming audio signal, which may be from a line performance or recording, is sampled at 72 at a selected rate and each sample is converted into an 8-bit digital word which is held in a buffer 74 until the next sample is taken. The sampling rate may be synchronized with the transport rate of the recording, if used. The content of the buffer 74 is transferred to the memory 84 under the control of a logic circuit 78 which interlaces the functions of writing into and reading out from the memory 84, giving priority to reading. Alternatively priority may be given to writing or be on a first come first served basis. Read-out from the memory 84 is at a rate controlled by a variable clock 77 and is via a second buffer 86 in which 1, 2, 3 or 4 least significant bits, as selected by resolution selector 89, may be dropped before conversion at 88 into an audio signal output. The lengths of the segments and the portions to be discarded or repeated are selectable, the latter being determined by the levels between which a read address counter cycles, the starting level being constant or quasi-random as determined by the 6 least significant digits in the buffer 86. The writing and read clock rates may be compared at 95 using an up/down counter stepped up by write clock pulses and down by read clock pulses for controlling the relative rates of writing and reading. Discarded portions may be fed to a second output channel, e.g. for dichotic presentation to respective ear phones of a head set. Two or three memories may be provided, Figs. 9 and 10, not shown, reading and writing occurring simultaneously from different memories, the memories changing functions from time to time. The logic circuits are described in detail, Figs. 5 to 8, not shown. The memories may be magnetic cores, bucket-brigade semiconductor memories, scan conversion tubes, ultrasonic light modulators, surface acoustic wave delay lines or photo-chromic stores.

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