Luminance compensation method and luminance compensation circuit

Abstract

Abstract Translated from Japanese (57)【要約】 【目的】表示セル数の増減に起因する負荷変動によるプ ラズマディスプレイの輝度変化を抑圧する。 【構成】信号ＣＣによりリセットされ表示データＤの数 を計数し計数値ＤＣを出力するカウンタ１と、計数値Ｄ Ｃと基準データＲと比較し差分信号ＤＦを出力する比較 器２と、フイールド信号Ｆ毎の走査信号Ｃを計数し信号 ＣＣ，ＣＳ，ＣＥを生成するカウンタ３と、信号ＣＳに 応答し差分信号ＤＦをセレクトし信号ＤＦＡ〜ＤＦＤを 供給するセレクタ４と、消去信号Ｅと信号ＣＥの供給に 応答し信号ＥＵＡ〜ＥＵＤを供給する分配器５と、信号 ＥＵＡ〜ＥＵＤの各々を信号ＤＦＡ〜ＤＦＤの指定する 時間分それぞれ遅延し消去パルスＥＡ〜ＥＤを出力する 遅延回路６Ａ〜６Ｄとを備える。 (57) [Summary] [Purpose] Suppresses changes in the brightness of the plasma display due to load fluctuations caused by an increase or decrease in the number of display cells. A counter 1 which is reset by a signal CC and counts the number of display data D and outputs a count value DC; A comparator 2 for comparing C with reference data R and outputting a difference signal DF, a counter 3 for counting the scanning signal C for each field signal F and generating signals CC, CS, CE, and a difference signal in response to the signal CS. A selector 4 for selecting DF and supplying the signals DFA to DFD, a distributor 5 for supplying the signals EUA to EUD in response to the supply of the erase signal E and the signal CE, and each of the signals EUA to EUD to the signals DFA to DFD. Delay circuits 6A to 6D which delay the designated time and output erase pulses EA to ED, respectively.

Inventors

• 👤 Shiyuuji Nakamura
• 👤 修士 中村

Bibliographic Details